K60P100M100SF2RM Datasheet, PDF (1524/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional description
51.4.1 Transmitter
INTERNAL BUS
MODULE
CLOCK
BAUDRATE GENERATE
SBR12:0
BRFA4:0
M10
M
TXINV
MSBF
UART DATA REGISTER (UART_D)
VARIABLE 12-BIT TRANSMIT
SHIFT REGISTER
SHIFT DIRECTION
R485 CONTROL
RTS_B
CTS_B
PE
PARITY
PT
GENERATION
IRQ / DMA
LOGIC
TRANSMITTER CONTROL
TxD Pin Control
Tx port en
Tx output buffer en
Tx input buffer en
7816 LOGIC
INFRARED LOGIC
TXDIR
DMA Done
SBK
TE
TxD
DMA Requests
IRQ Requests
TxD
LOOP
CONTROL
Figure 51-187. Transmitter Block Diagram
LOOPS
RSRC
51.4.1.1 Transmitter character length
The UART transmitter can accommodate either 8, 9, or 10-bit data characters. The state
of the C1[M] and C1[PE] bits and the C4[M10] bit determine the length of data
characters. When transmitting 9-bit data, bit C3[T8] is the ninth bit (bit 8).
1524
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.