K60P100M100SF2RM Datasheet, PDF (1614/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory map and register definition
52.4.20 ADMA Error Status Register (SDHC_ADMAES)
When an ADMA error interrupt has occurred, the ADMA error states field in this register
holds the ADMA state and the ADMA system address register holds the address around
the error descriptor.
For recovering from this error, the host driver requires the ADMA state to identify the
error descriptor address as follows:
• ST_STOP: Previous location set in the ADMA System Address register is the error
descriptor address.
• ST_FDS: Current location set in the ADMA System Address register is the error
descriptor address.
• ST_CADR: This state is never set because it only increments the descriptor pointer
and doesn’t generate an ADMA error.
• ST_TFR: Previous location set in the ADMA System Address register is the error
descriptor address.
In case of a write operation, the host driver should use the ACMD22 to get the number of
the written block, rather than using this information, since unwritten data may exist in the
host controller.
The host controller generates the ADMA error interrupt when it detects invalid descriptor
data (valid = 0) in the ST_FDS state. The host driver can distinguish this error by reading
the valid bit of the error descriptor.
Table 52-30. ADMA Error State Coding
D01-D00
00
01
10
11
ADMA error state (when error has
occurred)
ST_STOP (Stop DMA)
ST_FDS (fetch descriptor)
ST_CADR (change address)
ST_TFR (Transfer Data)
Contents of ADMA system address
register
Holds the address of the next
executable descriptor command
Holds the valid descriptor address
No ADMA error is generated
Holds the address of the next
executable descriptor command
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.