K60P100M100SF2RM Datasheet, PDF (986/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
The fixed frequency clock is an alternative clock source for the FTM counter that allows
the selection of a clock other than the system clock or an external clock. This clock input
is defined by chip integration. Refer the chip specific documentation for further
information. Due to FTM hardware implementation limitations, the frequency of the
fixed frequency clock must not exceed 1/2 of the system clock frequency.
The external clock passes through a synchronizer clocked by the system clock to assure
that counter transitions are properly aligned to system clock transitions.Therefore, to
meet Nyquist criteria considering also jitter, the frequency of the external clock source
must not exceed 1/4 of the system clock frequency.
39.4.2 Prescaler
The selected counter clock source passes through a prescaler that is a 7-bit counter. The
value of the prescaler is selected by the PS[2:0] bits. The following figure shows an
example of the prescaler counter and FTM counter.
FTM counting is up.
PS[2:0] = 001
CNTIN = 0x0000
MOD = 0x0003
selected input clock
prescaler counter 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
FTM counter
01
2
3
0
1
2
3
0
1
Figure 39-167. Example of the Prescaler Counter
39.4.3 Counter
The FTM has a 16-bit counter that is used by the channels either for input or output
modes. The FTM counter clock is the selected clock divided by the prescaler.
The FTM counter has these modes of operation:
• up counting (see Up Counting)
• up-down counting (see Up-Down Counting)
• quadrature mode (see Quadrature Decoder Mode)
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
986
Freescale Semiconductor, Inc.