K60P100M100SF2RM Datasheet, PDF (1326/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
CANx_RXMGMASK field descriptions (continued)
Field
Description
These bits mask the Mailbox filter bits. Note that the alignment with the ID word of the Mailbox is not
perfect as the two most significant MG bits affect the fields RTR and IDE, which are located in the Control
and Status word of the Mailbox. The following table shows in detail which MG bits mask each Mailbox
filter field.
SMB[RTR]¹
0
0
1
1
1
CTRL2[RRS] CTRL2[EACE
N]
MB[RTR]
-
0
note²
-
1
MG[31]
0
-
-
1
0
-
1
1
MG[31]
Mailbox filter fields
MB[IDE]
MB[ID]
note³
MG[28:0]
MG[30]
MG[28:0]
-
-
-
MG[28:0]
MG[30]
MG[28:0]
Reserved
MG[31:29]
MG[29]
MG[31:0]
MG[31:29]
MG[29]
1. RTR bit of the Incoming Frame. It is saved into an auxiliary MB called Rx Serial Message Buffer (Rx
SMB).
2. If the CTRL2[EACEN] bit is negated, the RTR bit of Mailbox is never compared with the RTR bit of the
incoming frame.
3. If the CTRL2[EACEN] bit is negated, the IDE bit of Mailbox is always compared with the IDE bit of the
incoming frame.
0 The corresponding bit in the filter is "don't care."
1 The corresponding bit in the filter is checked.
1. RTR bit of the Incoming Frame. It is saved into an auxiliary MB called Rx Serial Message Buffer (Rx SMB).
2. If the CTRL2[EACEN] bit is negated, the RTR bit of Mailbox is never compared with the RTR bit of the incoming frame.
3. If the CTRL2[EACEN] bit is negated, the IDE bit of Mailbox is always compared with the IDE bit of the incoming frame.
48.3.6 Rx 14 Mask Register (CANx_RX14MASK)
This register is located in RAM.
RX14MASK is provided for legacy support. When the MCR[IRMQ] bit is asserted,
RX14MASK has no effect.
RX14MASK is used to mask the filter fields of Message Buffer 14.
This register can only be programmed while the module is in Freeze Mode as it is
blocked by hardware in other modes.
Addresses: CAN0_RX14MASK is 4002_4000h base + 14h offset = 4002_4014h
CAN1_RX14MASK is 400A_4000h base + 14h offset = 400A_4014h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RX14M[31:0]
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1326
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.