K60P100M100SF2RM Datasheet, PDF (913/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
5
PDBIE
4
Reserved
3–2
MULT
1
CONT
0
LDOK
Chapter 38 Programmable Delay Block (PDB)
PDBx_SC field descriptions (continued)
Description
This bit is set when the counter value is equal to the IDLY register. Writing zero clears this bit.
PDB Interrupt Enable.
This bit enables the PDB interrupt. When this bit is set and DMAEN is cleared, PDBIF generates a PDB
interrupt.
0 PDB interrupt disabled
1 PDB interrupt enabled
This read-only field is reserved and always has the value zero.
Multiplication Factor Select for Prescaler
This bit selects the multiplication factor of the prescaler divider for the counter clock.
00 Multiplication factor is 1
01 Multiplication factor is 10
10 Multiplication factor is 20
11 Multiplication factor is 40
Continuous Mode Enable
This bit enables the PDB operation in Continuous mode.
0 PDB operation in One-Shot mode
1 PDB operation in Continuous mode
Load OK
Writing 1 to this bit updates the internal registers of MOD, IDLY, CHnDLYm, DACINTx, and POyDLY with
the values written to their buffers. The MOD, IDLY, CHnDLYm, DACINTx, and POyDLY will take effect
according to the LDMOD.
After 1 is written to LDOK bit, the values in the buffers of above registers are not effective and the buffers
cannot be written until the values in buffers are loaded into their internal registers.
LDOK can be written only when PDBEN is set or it can be written at the same time with PDBEN being
written to 1. It is automatically cleared when the values in buffers are loaded into the internal registers or
the PDBEN is cleared. Writing 0 to it has no effect.
38.3.2 Modulus Register (PDBx_MOD)
Addresses: PDB0_MOD is 4003_6000h base + 4h offset = 4003_6004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
MOD
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
913