K60P100M100SF2RM Datasheet, PDF (1416/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
SPIx_POPR field descriptions
Field
31–0
RXDATA
Received Data
Description
Contains the SPI data from the RX FIFO entry to which the Pop Next Data Pointer points.
49.3.10 DSPI Transmit FIFO Registers (SPIx_TXFRn)
TXFRn provide visibility into the TX FIFO for debugging purposes. Each register is an
entry in the TX FIFO. The registers are read-only and cannot be modified. Reading the
TXFRx registers does not alter the state of the TX FIFO.
Addresses: SPI0_TXFR0 is 4002_C000h base + 3Ch offset = 4002_C03Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
TXCMD_TXDATA
TXDATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SPIx_TXFRn field descriptions
Field
31–16
TXCMD_
TXDATA
15–0
TXDATA
Transmit Command or Transmit Data
Description
In master mode the TXCMD field contains the command that sets the transfer attributes for the SPI data.
In slave mode, the TXDATA contains 16 MSB bits of the SPI data to be shifted out.
Transmit Data
Contains the SPI data to be shifted out.
49.3.11 DSPI Receive FIFO Registers (SPIx_RXFRn)
RXFRn provide visibility into the RX FIFO for debugging purposes. Each register is an
entry in the RX FIFO. The RXFR registers are read-only. Reading the RXFRx registers
does not alter the state of the RX FIFO.
Addresses: SPI0_RXFR0 is 4002_C000h base + 7Ch offset = 4002_C07Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RXDATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1416
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.