K60P100M100SF2RM Datasheet, PDF (787/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 33 Random Number Generator (RNGB)
33.3.2 RNGB Command Register (RNG_CMD)
RNG_CMD controls the RNG's operating modes and interrupt status.
Address: RNG_CMD is 400A_0000h base + 4h offset = 400A_0004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
000 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
RNG_CMD field descriptions
Field
31–7
Reserved
6
SR
Description
This read-only field is reserved and always has the value zero.
Reserved, must be cleared.
Software reset.
Performs a software reset of the RNGB. This bit is self-clearing.
0 Do not perform a software reset.
1 Software reset.
5
Clear error.
CE
Clears the errors in the RNG_ESR register and the RNGB interrupt.This bit is self-clearing.
0 Do not clear errors and interrupt.
1 Clear errors and interrupt.
4
Clear interrupt.
CI
Clears the RNGB interrupt if an error is not present. This bit is self-clearing.
3–2
Reserved
1
GS
0 Do not clear interrupt.
1 Clear interrupt.
This read-only field is reserved and always has the value zero.
Reserved, must be cleared.
Generate seed.
Initiates the seed generation process. Seed generation starts
• When RNG_SR[BUSY] is cleared
• If set simultaneously with ST, after self-test
When the seed generation process completes, this bit automatically clears and an interrupt may be
generated if all requested operations are complete.
0 Not in seed generation mode.
1 Generate seed mode.
0
Self test.
ST
Initiates a self test of the RNGB's internal logic. The self-test starts
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
787