SH7763 Datasheet, PDF (984/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
Bit
Bit Name
17
RDEIP
16
RFOFIP
15 to 11 
10
DLCIP
9
CDIP
8
TROIP
7
RMAFIP
6
CEEFIP
5
CELFIP
4
RRFIP
Initial
Value
0
0
All 0
0
0
0
0
0
0
0
R/W Description
R/W Receive Descriptor Empty Interrupt Enable
0: Receive descriptor empty interrupt is disabled
1: Receive descriptor empty interrupt is enabled
R/W Receive FIFO Overflow Interrupt Enable
0: Overflow interrupt is disabled
1: Overflow interrupt is enabled
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Detect Loss of Carrier Interrupt Enable
0: Detect loss of carrier interrupt is disabled
1: Detect loss of carrier interrupt is enabled
R/W Delayed Collision Detect Interrupt Enable
0: Delayed collision detect interrupt is disabled
1: Delayed collision detect interrupt is enabled
R/W Transmit Retry Over Interrupt Enable
0: Transmit retry over interrupt is disabled
1: Transmit retry over interrupt is enabled
R/W Receive Multicast Address Frame Interrupt Enable
0: Receive multicast address frame interrupt is disabled
1: Receive multicast address frame interrupt is enabled
R/W Carrier Extension Error Interrupt Enable
0: Carrier extension error interrupt is disabled
1: Carrier extension error interrupt is enabled
R/W Carrier Extension Loss Interrupt Enable
0: Carrier extension loss interrupt is disabled
1: Carrier extension loss interrupt is enabled
R/W Receive Residual-Bit Frame Interrupt Enable
0: Receive residual-bit frame interrupt is disabled
1: Receive residual-bit frame interrupt is enabled
Rev. 1.00 Oct. 01, 2007 Page 918 of 1956
REJ09B0256-0100