SH7763 Datasheet, PDF (1302/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 29 Serial I/O with FIFO (SIOF)
29.4.9 Transmit and Receive Timing
Examples of the SIOF serial transmission and reception are shown in figure 29.13 to figure 29.19.
(1) 8-bit Monaural Data (Case 1)
Synchronous pulse method, falling edge sampling, slot No.0 used for transmit and receive data, an
frame length = 8 bits
1 frame
SIOF_SCK
SIOF_SYNC
SIOF_TXD
SIOF_RXD
L-channel data
Slot No.0
1-bit delay
Specifications: TRMD[1:0] = 00 or 10,
TDLE = 1,
RDLE = 1,
CD0E = 0,
REDG = 0,
FL[3:0] = 0000 (frame length: 8 bits)
TDLA[3:0] = 0000, TDRE = 0, TDRA[3:0] = 0000,
RDLA[3:0] = 0000, RDRE = 0, RDRA[3:0] = 0000,
CD0A[3:0] = 0000, CD1E = 0, CD1A[3:0] = 0000
Figure 29.13 Transmit and Receive Timing (8-Bit Monaural Data (1))
Rev. 1.00 Oct. 01, 2007 Page 1236 of 1956
REJ09B0256-0100