SH7763 Datasheet, PDF (1042/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
Interrupt Interrupt Source
Transmit/ Receive Multicast Address Frame
receive
Carrier Extension Error
interrupt for
port 0
Carrier Extension Loss
(GEINT0) ^{Receive Residual-Bit Frame}
Receive Too-Long Frame
Receive Too-Short Frame
PHY-LSI Receive Error
CRC Error on Received Frame
Transmit/ Write-Back Completed
receive
Transmit Underflow Frame Write-Back
interrupt for _Completed
port 1
(GEINT1)
Receive Overflow Frame Write-Back
Completed
Transmit Abort Detect
Receive Abort Detect
Receive Frame Counter Overflow
Register and Bit
EESR0.RMAF
EESR0.CEEF
EESR0.CELF
EESR0.RRF
EESR0.RTLF
EESR0.RTSF
EESR0.PRE
EESR0.CERF
EESR1.TWB
EESR1.TUC
EESR1.ROC
EESR1.TABT
EESR1.RABT
EESR1.RFCOF
E-MAC Status Register Source
EESR1.ECI
Frame Transmission Completed
Transmit Descriptor Empty
EESR1.TUC
EESR1.TDE
Transmit FIFO Underflow
EESR1.TFUF
Frame Reception
Receive Descriptor Empty
EESR1.FR
EESR1.RDE
Receive FIFO Overflow
EESR1.RFOF
Carrier Loss Detection
EESR1.DLC
Delayed Collision Detect
EESR1.CD
Interrupt Generated
Timing
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
After write-back
When the interrupt
source is detected
When the interrupt
source is detected
After write-back
When the interrupt
source is detected
When the interrupt
source is detected
After write-back
When the interrupt
source is detected
When the interrupt
source is detected
When the interrupt
source is detected
When the interrupt
source is detected
Rev. 1.00 Oct. 01, 2007 Page 976 of 1956
REJ09B0256-0100