SH7763 Datasheet, PDF (576/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
(14) PCI Power Management Interrupt Register (PCIPINT)
This register controls the power management interrupt.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
————————————————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R R R R R R R R R R R R R R R R
PCI R/W: — — — — — — — — — — — — — — — —
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
—
—
—
—
PMD PMD PMD PMD
3H 2
1
0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R R R R R R R R R R R R R/WC R/WC R/WC R/WC
PCI R/W: — — — — — — — — — — — — — — — —
Bit
31 to 4
3
2
1
0
Initial
Bit Name Value

All 0
PMD3H 0
PMD2 0
PMD1 0
PMD0 0
R/W
Description
SH: R Reserved
PCI:  These bits are always read as 0. The write value should
always be 0.
SH: R/WC PCI Power Management D3 Hot Status Transition
PCI:  ^Interrupt
0: Interrupt request for a transition to D3 is not detected
1: Interrupt request for a transition to D3 is detected
SH: R/WC PCI Power Management D2 Status Transition Interrupt
PCI:  0: Interrupt request for a transition to D2 is not detected
1: Interrupt request for a transition to D2 is detected
SH: R/WC PCI Power Management D1 Status Transition Interrupt
PCI:  0: Interrupt request for a transition to D1 is not detected
1: Interrupt request for a transition to D1 is detected
SH: R/WC PCI Power Management D0 Status Transition Interrupt
PCI:  0: Interrupt request for a transition to D0 is not detected
1: Interrupt request for a transition to D0 is detected
Rev. 1.00 Oct. 01, 2007 Page 510 of 1956
REJ09B0256-0100