SH7763 Datasheet, PDF (1001/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
23.3.88 Receive Data Padding Insert Register (RPADIR)
RPADIR is a 32-bit readable/writable register that inserts padding in receive data. When changing
the settings of this register, execute a software reset by means of the SWRT and SWRR bits in the
E-DMAC mode register (EDMR) before making settings again.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16











PADS[4:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PADR[15:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
31 to 21 
Initial
Value
All 0
20 to 16 PADS[4:0] H'00
15 to 0 PADR[15:0] H'0000
R/W Description
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Padding Size
H'00: No padding insertion
H'01: 1-byte insertion
:
:
H'1F: 31-byte insertion
R/W Padding Slot
H'0000: Inserts specified size of padding at the first
byte
H'0001: Inserts specified size of padding at the second
byte
:
:
H'FFFF: Inserts specified size of padding at the 64K
byte
Rev. 1.00 Oct. 01, 2007 Page 935 of 1956
REJ09B0256-0100