SH7763 Datasheet, PDF (702/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 16 Clock Pulse Generator (CPG)
(9) Module Stop Registers 0, 1(MSTPCR0 and MSTPCR1)
The module stop registers have control bits for running/stopping the individual peripheral
modules.
(10) Standby Control Register (STBCR)
The standby control register has bits for controlling the power-down modes.
16.2 Input/Output Pins
Table 16.1 lists the CPG pin configuration.
Table 16.1 Pin Configuration and Functions of CPG
Pin Name Function
I/O
Description
MD0
MD1
MD2
Mode control pins 0, Input
1, 2
Input
(Clock operating
mode)
Input
Sets the clock operating mode after a power-on
reset.
MD8
Mode control pin 8 Input Selects the use of the crystal resonator.
(Clock input mode)
MD8 = low: External clock is input from the
EXTAL pin.
MD8 = high: Crystal resonator is connected to the
EXTAL and XTAL pins.
XTAL
Clock pins
Output A crystal resonator is connected.
EXTAL
Input
A crystal resonator is connected, or an external
clock is input.
CLKOUT
Output Used as an external bus clock output pin.
Note: For the guaranteed AC timing of the CLKOUT pin, refer to the section on electrical
characteristics. Pay attention to the relationship between the input frequency of the crystal
oscillator and the multiplication ratio.
Rev. 1.00 Oct. 01, 2007 Page 636 of 1956
REJ09B0256-0100