SH7763 Datasheet, PDF (1445/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 32 PC Card Controller (PCC)
Bit
Bit Name Initial Value R/W Description
1
P0BWE 0
R/W PCC0 Battery Warning Enable
When the PC card connected to area 6 is on the IC
memory card interface, bit 1 enables or disables the
interrupt request when the BVD2 and BVD1 pins are in
the state in which “the battery must be changed
although the data is guaranteed”. This bit has no
meaning on the I/O card interface.
0: No interrupt occurs when the BVD2 and BVD1 pins
are in the state in which “the battery must be
changed although the data is guaranteed”
1: An interrupt occurs when the BVD2 and BVD1 pins
are in the state in which “the battery must be
changed although the data is guaranteed”
0
P0BDE 0
R/W PCC0 Battery Dead Enable
When the PC card connected to area 6 is on the IC
memory card interface, bit 0 enables or disables the
interrupt request when the BVD2 and BVD1 pins are in
the state in which “the battery must be changed since
the data is not guaranteed”. This bit has no meaning on
the I/O card interface.
0: No interrupt occurs when the BVD2 and BVD1 pins
are in the state in which “the battery must be
changed since the data is not guaranteed”
1: An interrupt occurs when the BVD2 and BVD1 pins
are in the state in which “the battery must be
changed since the data is not guaranteed”
Rev. 1.00 Oct. 01, 2007 Page 1379 of 1956
REJ09B0256-0100