SH7763 Datasheet, PDF (1010/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
(b) Transmit Descriptor 1 (TD1)
TD1 indicates the data length of the transmit buffer used by the corresponding descriptor.
The user should set TD1 before the start of a read by the E-DMAC.
Bit
Initial
Bit
Name Value R/W Description
31 to 16 TDL All 0 R/W Transmit Buffer Data Length (in bytes)
These bits indicate the data length of the corresponding
transmit buffer in bytes. The maximum length is between 64
kbytes and 32 bytes (H'FFE0).
15 to 0 
All 0 R
Reserved
These bits are always read as 0. The write value should
always be 0.
(c) Transmit Descriptor 2 (TD2)
TD2 indicates the start address of the corresponding 32-bit width transmit buffer. An address
value should be specified in a longword boundary.
Bit
Initial
Bit
Name Value R/W Description
31 to 0 TBA All 0 R/W Transmit Buffer Start Address
These bits set the start address of the corresponding
transmit buffer in a 16-bit boundary.
If descriptors are set below, the E-DMAC does not return to normal operation until a system reset
is performed.
• TFP (transmit frame position) is not logically correct
Example: The TFP bits are set to 11 in a descriptor (descriptor A) and the TFP bits are set to
01 in the next descriptor (descriptor B). This specification means that there is no
descriptor indicating the start of the transmit frame specified by descriptor B.
• TBL (transmit buffer length) is set to 0
Rev. 1.00 Oct. 01, 2007 Page 944 of 1956
REJ09B0256-0100