SH7763 Datasheet, PDF (1536/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 35 USB Host Controller (USBH)
Bit
Bit Name Initial Value R/W Description
6
RHSC
0
R/W RootHubStatusChangeDisable
0: Ignored
1: Interrupt due to Root Hub Status Change is
disabled.
5
FNO
0
R/W FrameNumberOverflowDisable
0: Ignored
1: Interrupt due to Frame Number Overflow is
disabled.
4
UE
0
R/W UnrecoverableErrorDisable
This function is not supported. Writing is ignored.
3
RD
0
R/W ResumeDetectedDisable
0: Ignored
1: Interrupt due to Resume Detected is disabled.
2
SF
0
R/W StartOfFrameDisable
0: Ignored
1: Interrupt due to Start of Frame is disabled.
1
WDH
0
R/W WritebackDoneHeadDisable
0: Ignored
1: Interrupt due to Writeback Done Head is
disabled.
0
SO
0
R/W SchedulingOverrunDisable
0: Ignored
1: Interrupt generation due to Scheduling Overrun
is disabled.
Rev. 1.00 Oct. 01, 2007 Page 1470 of 1956
REJ09B0256-0100