SH7763 Datasheet, PDF (1047/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
(3) PAUSE Frame Reception
The next frame is not transmitted until the time indicated by the Timer value elapses after
receiving a PAUSE frame. However, the transmission of the current frame is continued. A
received PAUSE frame is valid only when the RXF bit in ECMR is set to 1. The number of times
of PAUSE frame receptions is counted.
(4) 0-Time PAUSE Frame Control
Flow control is performed using a PAUSE frame with the TIME parameter value set to 0. The
PAUSE frame with the TIME parameter set to 0 can be enabled or disabled by the ZPF bit in
ECMR.
• When PAUSE frame control with the TIME parameter value set to 0 is enabled
A PAUSE frame with the TIME parameter value set to 0 is transmitted when the number of
data in the receive FIFO is less than the FCFTR value before the time indicated by the TIME
parameter value has not elapsed. When a PAUSE frame with the time indicated by the TIME
parameter value set to 0 is received, the transmit standby state is canceled.
• When PAUSE frame control with the TIME parameter value set to 0 is disabled
A PAUSE frame with the TIME parameter value set to 0 is not transmitted. When a PAUSE
frame with the TIME parameter value set to 0 is received, the PAUSE frame is discarded.
23.4.11 Magic Packet Detection
The GETHER has a Magic Packet detection function. This function provides a Wake-On-LAN
(WOL) facility that starts each peripheral device connected to a LAN from the host device or other
source. This enables to construct a system in which a peripheral device receives a Magic Packet
sent from the host device or other source, and starts itself. When the Magic Packet is detected,
data is stored in the FIFO by the broadcast packet that has received data previously and the E-
MAC is notified of the receiving status. To return to normal operation from the interrupt
processing, the E-MAC, TSU and E-DMAC must be initialized by using ARST bit in ARSTR.
With a Magic Packet, reception is performed regardless of the destination address. As a result, this
function is valid, and the ET_WOL pin enabled, only in the case of a match with the destination
address specified by the format in the Magic Packet. Further information on Magic Packets can be
found in the technical documentation published by AMD Corporation.
Rev. 1.00 Oct. 01, 2007 Page 981 of 1956
REJ09B0256-0100