SH7763 Datasheet, PDF (1684/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 37 LCD Controller (LCDC)
37.3.19 LCDC Control Register (LDCNTR)
LDCNTR specifies start and stop of display by the LCDC.
When 1s are written to the DON2 bit and the DON bit, the LCDC starts display. Turn on the LCD
module following the sequence set in the LDPMMR and LDCNTR. The sequence ends when the
LPS[1:0] value changes from B'00 to B'11. Do not make any action to the DON bit until the
sequence ends.
When 0 is written to the DON bit, the LCDC stops display. Turn off the LCD module following
the sequence set in the LDPMMR and LDCNTR. The sequence ends when the LPS[1:0] value
changes from B'11 to B'00. Do not make any action to the DON bit until the sequence ends.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0










 DON2 

 DON
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R R/W R
R
R R/W
Bit Bit Name
15 to 5 
4
DON2
3 to 1 
Initial Value R/W
All 0
R
0
R/W
All 0
R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Display On 2
Specifies the start of the LCDC display operation.
0: LCDC is being operated or stopped
1: LCDC starts operation
When this bit is read, always read as 0. Write 1 to
this bit only when starting display. If a value other
than 0 is written when starting display, the
operation is not guaranteed. When 1 is written to, it
resumes automatically to 0. Accordingly, this bit
does not need to be cleared by writing 0.
Reserved.
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Oct. 01, 2007 Page 1618 of 1956
REJ09B0256-0100