SH7763 Datasheet, PDF (1479/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Write to codec.
Write 0 to TSR. CMDAMT.
Write 0 to TSR. CMDDMT.
Clear RetryCnt to 0.
Write Data to CSDR.
Write Addr to CSDR.
Clear LoopCnt to 0.
Section 33 Audio Codec Interface (HAC)
Necessary setting:
ACR.TX12_ATOMIC = 1
TSR.CMDAMT = 1&
No
TSR. CMDDMT = 1
Yes
Wait for 1 µs
LoopCnt ++
No
E1 < LoopCnt 1
Yes
RetryCnt ++
No
5 < RetryCnt
Yes
Return
Error
Notes: E1: Number required for the target system.
(21 < E1 <1000)
Input: Addr: Address of the codec register to be written to
Data: Data to be written to the codec register
RetryCnt: Software counter for error detection
LoopCnt: Software counter for wait insertion
Figure 33.4 Sample Flowchart for Off-Chip Codec Register Write
Rev. 1.00 Oct. 01, 2007 Page 1413 of 1956
REJ09B0256-0100