SH7763 Datasheet, PDF (1603/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 36 USB Function Controller (USBF)
36.3.28 Data Status Register (DASTS)
DASTS indicates whether the IN FIFO data register contains valid data. DASTS is set to 1 when
data written to IN FIFO is enabled by writing PKTE in TRG to 1, and cleared when all data has
been transmitted to the host. In case of a dual-configuration FIFO for endpoint 2, this bit is cleared
to 0 when both sides are empty.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
————————————————
Initial value: — — — — — — — — — — — — — — — —
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
—
—
EP3 EP2
DE DE
—
—
—
EP0i
DE
Initial value: — — — — — — — — 0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit Bit Name
31 to 8 
7, 6 
5
4
3 to 1
EP3 DE
EP2 DE

0
EP0iDE
Initial Value R/W Description
Undefined R Reserved
These bits are always read as undefined value.
All 0
R Reserved
These bits are always read as 0.
0
R EP3 Data Enable
0
R EP2 Data Enable
All 0
R Reserved
These bits are already read as 0.
0
R EP0i data enable
Rev. 1.00 Oct. 01, 2007 Page 1537 of 1956
REJ09B0256-0100