SH7763 Datasheet, PDF (355/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 9 Interrupt Controller (INTC)
INT2B11: Indicates detailed interrupt sources for the SIM.
Module
SIM
Bit
31 to 4
3
2
1
0
Source
—
TEND
TXI
RXI
ERI
Function
Description
These bits are always read as 0. The Indicates SIM interrupt
write value should always be 0.
sources. This register
Transmit end interrupt
indicates the SIM
interrupt sources even
Transmit data empty interrupt
if mask setting is made
Receive data full interrupt
Transmit/receive error interrupt
in the interrupt mask
register for them.
9.3.23 GPIO Interrupt Set Register (INT2GPIC)
INT2GPIC enables interrupt requests input from the following pins: PTB0 to PTB7 and PTM0 to
PTM7.
A GPIO interrupt is a low active and level-sense signal. Before enabling an interrupt request, set
the corresponding pin as an input with the corresponding port control register (PBCR, PMCR).
For the port control registers, see section 40, General Purpose I/O (GPIO).
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
−
−−
− − PINT PINT PINT PINT
15E 14E 13E 12E
−
−
−
PINT PINT PINT PINT
11E 10E 9E 8E
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R R R R R/W R/W R/W R/W R R R R R/W R/W R/W R/W
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
−
−−
− − PINT PINT PINT PINT
7E 6E 5E 4E
−
−
−
PINT PINT PINT PINT
3E 2E 1E 0E
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R R R R R/W R/W R/W R/W R R R R R/W R/W R/W R/W
Rev. 1.00 Oct. 01, 2007 Page 289 of 1956
REJ09B0256-0100