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SH7763 Datasheet, PDF (1166/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series
Section 27 Serial Communication Interface with FIFO (SCIF)
Figure 27.10 shows an example of the operation for transmission in asynchronous mode.
1
Serial
data
Start
bit
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 1
1
Idle state
(mark state)
TDFE
TEND
TXI interrupt
TXI interrupt
request Data written to SCFTDR request
and TDFE flag read as 1
then cleared to 0 by TXI
interrupt handler
One frame
Figure 27.10 Sample SCIF Transmission Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
4. When modem control is enabled, transmission can be stopped and restarted in accordance with
the SCIF_CTS input value. When SCIF_CTS is set to 1 during transmission , the line goes to
the mark state after transmission of one frame. When SCIF_CTS is set to 0, the next transmit
data is output starting from the start bit.
Figure 27.11 shows an example of the operation when modem control is used.
Serial data
SCIF_TXD
Start
bit
0 D0 D1
ParityStop
bit bit
D7 0/1
Start
bit
0 D0 D1
D7 0/1
SCIF_CTS
Drive high before stop bit
Figure 27.11 Sample Operation Using Modem Control (SCIF_CTS)
Rev. 1.00 Oct. 01, 2007 Page 1100 of 1956
REJ09B0256-0100