SH7763 Datasheet, PDF (1740/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 39 D/A Converter (DAC)
39.2 Input/Output Pins
Table 39.1 summarizes the input/output pins used by the D/A converter.
Table 39.1 Pin Configuration
Pin Name
AVcc
AVss
DA0
DA1
I/O


Output
Output
Function
Analog block power supply and D/A conversion reference voltage
Analog block ground
Channel 0 analog output
Channel 1 analog output
39.3 Register Descriptions
Table 39.2 shows the ADC register configuration. Table 39.3 shows the register state in each
operating mode.
Table 39.2 Register Configuration
Register Name
Area P4
Abbreviation R/W Address*
Area 7
Address*
Access
Size
D/A data register 0
DADR0
R/W H'FFEA 8000 H'1FEA 8000 8
D/A data register 1
DADR1
R/W H'FFEA 8002 H'1FEA 8002 8
D/A control register
DACR
R/W H'FFEA 8004 H'1FEA 8004 8
Note: * P4 addresses are used when area P4 in the virtual address space is used, and area 7
addresses are used when accessing the register through area 7 in the physical address
space using the TLB.
Table 39.3 Register State in Each Operating Mode
Register Name
D/A data register 0
D/A data register 1
D/A control register
Power-On Manual
Abbreviation Reset
Reset
DADR0
H'00
H'00
DADR1
H'00
H'00
ADCR
H'3F
H'3F
Sleep
Retained
Retained
Retained
Standby
Retained
Retained
Retained
Rev. 1.00 Oct. 01, 2007 Page 1674 of 1956
REJ09B0256-0100