SH7763 Datasheet, PDF (411/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Local Bus State Controller (LBSC)
Bit
3
2 to 0
Bit Name
MPX
TYPE
Initial
Value
0
000
R/W
R/W*
R/W
Description
MPX Interface Setting
Selects the type of MPX interface
0: SRAM/byte-control SRAM interface selected
1: MPX interface selected
Note: * The MPX bit in CS0BCR is read-only.
Memory Type Setting
Specify the type of memory connected to the space.
000: SRAM (Initial value)
001: SRAM with byte selection*¹
010: Burst ROM (burst at read/SRAM at write)
011: Reserved (Setting prohibited)
100: PCMCIA *²
101: Reserved (Setting prohibited)
110: Reserved (Setting prohibited)
111: Reserved (Setting prohibited)
Note: 1. Setting possible only in CS1BCR and
CS4BCR
2. Setting possible only in CS5BCR and
CS6BCR
Rev. 1.00 Oct. 01, 2007 Page 345 of 1956
REJ09B0256-0100