SH7763 Datasheet, PDF (935/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
23.3.46 VLANtag Set Register (Port 0) (TSU_VTAG0)
TSU_VTAG0 enables or disables the frame receive/discard evaluation function based on the
VLAN number in port 0 relay operations, and also sets the VLAN number.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
VTAG
0















Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0




VID0[11:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
31
VTAG0
30 to 12 
11 to 0 VID0[11:0]
Initial
Value
0
All 0
All 0
R/W Description
R/W Port 0 VLANtag Evaluation Function
0: Disables receive/discard evaluation for frames based
on the VLAN number
1: Enables receive/discard evaluation for frames based
on the VLAN number
R Reserved
These bits are always read as 0. The write value should
always be 0.
R/W V-LAN ID Setting (VID)
These bits set the VLAN number received by port 0
receive frames.
Rev. 1.00 Oct. 01, 2007 Page 869 of 1956
REJ09B0256-0100