SH7763 Datasheet, PDF (1734/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 38 A/D Converter
38.4.4 A/D Conversion Time
Table 38.5 indicates the A/D conversion time.
Table 38.5 A/D Conversion Time
Pck0/4
Pck0/8
Pck0/16
Pck0/32
Conversion Time Type
Min Max Min Max Min Max Min Max
A/D conversion time for the first 136 139 268 275 532 547 1060 1091
conversion (single mode)*
A/D conversion time for the
—
second and subsequent
conversions (multi mode or scan
mode)
128 —
256 —
512 —
1024
Notes: Values in the table are the numbers of states (one state is one peripheral clock (IO-Bus)
Pck0 cycle).
* Period starting from when the ADST bit is set to 1 and until data is stored in the register.
38.5 Interrupts
The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
The ADI interrupt request is enabled/disabled by specifying the ADIE bit in ADCSR.
Rev. 1.00 Oct. 01, 2007 Page 1668 of 1956
REJ09B0256-0100