SH7763 Datasheet, PDF (1674/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 37 LCD Controller (LCDC)
37.3.13 LCDC Vertical Total Line Number Register (LDVTLNR)
LDVTLNR specifies the LCD panel's entire vertical size including the vertical retrace period.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0





VTLN[10:0]
Initial value: 0
0
0
0
0
0
0
1
1
1
0
1
1
1
1
1
R/W: R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
15 to 11 
Initial Value R/W
All 0
R
10 to 0 VTLN[10:0] 00111011111 R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Vertical Total Line Number
Set the total number of vertical display lines (unit:
line).
Specify to the value of (the number of total line) -1.
The minimum for the total number of vertical lines is
2 lines. The following conditions must be satisfied:
VTLN>=VDLN, VTLN>=1.
Example: For an 480-line LCD module and a
vertical period of 0 lines.
VTLN = (480+0) –1 = 479 = H'1DF
Rev. 1.00 Oct. 01, 2007 Page 1608 of 1956
REJ09B0256-0100