SH7763 Datasheet, PDF (598/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
31 26 25
SH address
18 17
0
31 26 25
18 17
0
PCI address
mask
31 26 25
18 17
0
PCIMBMR1
MSBAM1
31 26 25
18 17
0
PCIMBR1
PMSBA1
Figure 13.4 SuperHyway Bus to PCI Local Bus Address Translation
(PCI Memory Space 1)
For PCI memory space 2 accesses, bits 28 to 18 of a SuperHyway address are controlled by the
PCI memory bank mask register 2 (PCIMBMR2).
• PCIMBMR2 [28:18] B'1 1111 1111 11: PCI address [28:18] = SH address [28:18]
• PCIMBMR2 [28:18] B'0 1111 1111 11: PCI address [28:18] = PCIMBR2 [28], SH address [27:18]
• PCIMBMR2 [28:18] B'0 0000 0000 01: PCI address [28:18] = PCIMBR2 [28:19], SH address [18]
• PCIMBMR2 [28:18] B'0 0000 0000 00: PCI address [28:18] = PCIMBR2[28:18]
The upper three bits ([31:29]) of a SuperHyway bus address are replaced with bits 31 to 29 in PCI
memory bank register 2 (PCIMBR2).
SH address
31 29 28
18 17
0
31 29 28
18 17
0
PCI address
PCIMBMR2
mask
31 29 28
18 17
0
MSBAM2
31 29 28
18 17
0
PCIMBR2
PMSBA2
Figure 13.5 SuperHyway Bus to PCI Local Bus Address Translation
(PCI Memory Space 2)
Rev. 1.00 Oct. 01, 2007 Page 532 of 1956
REJ09B0256-0100