SH7763 Datasheet, PDF (558/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
(5) PCI Local Address Register 1 (PCILAR1)
Refer to Section 13.4.4 (1), Accessing This LSI Address Space.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
LAR
————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R R
PCI R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
————————————————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R R R R R R R R R R R R R R R R
PCI R/W: R R R R R R R R R R R R R R R R
Initial
Bit
Bit Name Value R/W
31 to 20 LAR
H'000 SH: R/W
PCI: R
19 to 0 
All 0 SH: R
PCI: R
Description
Local Address (12 bits)
Specify bits 31 to 20 of the start address in local
address space 1.
The effective bits of LAR depend on the capacity of
local address space 1 as specified in PCILSR1.
The effective bits are as follows:
PCILSR1.LS1([28:20]) = 0 0000 0000: Effective bits are [31:20]
PCILSR1.LS1([28:20]) = 0 0000 0001: Effective bits are [31:21]
PCILSR1.LS1([28:20]) = 0 0000 0011: Effective bits are [31:22]
|
|
PCILSR0.LS1([28:20]) = 0 1111 1111: Effective bits are [31:28]
PCILSR1.LS1([28:20]) = 1 1111 1111: Effective bits are [31:29]
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Oct. 01, 2007 Page 492 of 1956
REJ09B0256-0100