SH7763 Datasheet, PDF (249/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 6 Memory Management Unit (MMU)
31
20 19
12 11 8 7
0
Address field _{1 1 1 1 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 0}
E
00 0 0 0 0 0 0
31
Data field
VPN
24 23
8
0
V
VPN: Physical page number
V: Validity bit
E: Entry
: Reserved bits (write value should be 0
and read value is undefined )
Figure 6.18 Memory-Mapped PMB Address Array
31
20 19
12 11 8 7
0
Address field _{1 1 1 1 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 E 0 0 0 0 0 0 0 0}
31
Data field
PPN
24 23
10 9 8 7 6 5 4 3 2 1 0
UB V
C
PPN: Physical page number
V: Validity bit
E: Entry
SZ: Page size bits
UB: Buffered write bit
C: Cacheability bit
SZ
WT
WT: Write-through bit
: Reserved bits (write value should be 0
and read value is undefined )
Figure 6.19 Memory-Mapped PMB Data Array
Rev. 1.00 Oct. 01, 2007 Page 183 of 1956
REJ09B0256-0100