SH7763 Datasheet, PDF (723/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 17 Watchdog Timer and Reset (WDT)
WDTCNT
value
Setting value
of WDTST
Interval timer mode:
Clear counter when overflowed
WDT mode:
Clear counter after
reset operation
Counting up with
overflow signal of WDTBCNT
H'0000 0000
Time
WDTBCNT
value
H'0003 FFFF
Clear counter
when overflowed
Counting up
with Pck
H'0000 0000
TME
WOVF, IOVF
Reset
(internal)
Start counting up
Interval
timer mode
WDT
mode
Time
Set flag
Figure 17.2 WDT Counting Up Operation
Rev. 1.00 Oct. 01, 2007 Page 657 of 1956
REJ09B0256-0100