SH7763 Datasheet, PDF (688/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 15 External CPU Interface (EXCPU)
15.2 Input/Output Pins
Table 15.1 shows the pin configuration of the EXCPU.
Table 15.1 Pin Configuration
Pin Name
EX_CS0
EX_CS1
Symbol
Chip select 0
Chip select 1
EX_BS
EX_FRAME
EX_RDWR
EX_SIZE2 to
EX_SIZE0
Bus cycle start
Access cycle
Read/write
Access size
EX_AD0
EX_AD31
Address/data
EX_RDY
EX_INT
MD10
Ready
External CPU
interrupt
Mode control
I/O
Input
Input
Input
Input
Input
Input
Input/
output
Output
Output
Description
Indicates access to the DDR-SDRAM space
Indicates access to an internal register of this
LSI
Indicates an address phase
Indicates an access cycle period
Indicates whether it is data write or read
Indicates the access size
Note: These pins are used in the SH7750
Group. In the SH7751 Group, pins D31 to
D29 act as access size signals.
During an address phase, signals on EX_AD25
to EX_AD0 are input as an address
During a data phase, signals on EX_AD25 to
EX_AD0 are input as data
Wait state request signal
Interrupt signal
Input
External CPU connection select
Rev. 1.00 Oct. 01, 2007 Page 622 of 1956
REJ09B0256-0100