SH7763 Datasheet, PDF (389/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Local Bus State Controller (LBSC)
Pin Name
Function
I/O
Description
BREQ
Bus Release
Request
Input
Bus release request signal
BACK
Bus Request Output Bus release acknowledge signal
Acknowledge
CE2A*¹,
CE2B*¹
PCMCIA Card
Select
Output
When setting PCMCIA, corresponds to PCMCIA
card select signal D15 to D8.
Valid only in little endian mode
CE1A*¹,
CE1B*¹
PCMCIA Card Output When setting PCMCIA, corresponds to PCMCIA
Select
card select signal D7 to D0.
MD3, MD4
Area 0 Bus
Width
Input
Signal setting area 0 bus width and MPX
interface at power-on reset
MD5
Endian
Switchover
Input Endian setting at a power-on reset
DACK0*²
DMAC0
Acknowledge
Signal
Output Data acknowledge of DMAC channel 0
DACK1*²
DMAC1
Acknowledge
Signal
Output Data acknowledge of DMAC channel 1
DACK2*²
DMAC2
Acknowledge
Signal
Output Data acknowledge of DMAC channel 2
DACK3*²
DMAC3
Acknowledge
Signal
Output Data acknowledge of DMAC channel 3
TEND0*²
DMAC0
Transfer End
Signal
Output Transfer end of DMAC channel 0
TEND1*²
DMAC1
Transfer End
Signal
Output Transfer end of DMAC channel 1
TEND2*²
DMAC2
Transfer End
Signal
Output Transfer end of DMAC channel 2
TEND3*²
DMAC3
Transfer End
Signal
Output Transfer end of DMAC channel 3
Notes: 1. When bits TYPE [2:0] in the CS5 bus control register (CS5BCR) are set to B'100, CE2A
and CE1A act as PCMCIA output pins, and bits TYPE [2:0] in the CS6 bus control
register (CS6BCR) are set to b'100, CE2B and CE1B act as PCMCIA output pins.
Rev. 1.00 Oct. 01, 2007 Page 323 of 1956
REJ09B0256-0100