SH7763 Datasheet, PDF (89/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 1 Overview
Pin No. Pin Name
G2
M_D21
G3
M_D22
G4
VCCQ-DDR
G5
VCCQ-DDR
G21 VDD
G22 PTL3/D19/EX_AD19/IRQ7/
IRL7/ET0_MDIO/INTC/
LCD_D11
G23 PTL2/D18/EX_AD18/IRQ6/
IRL6/ET0_ETXD3/TEND0/
LCD_D10
G24
WE3/IOWR
G25
WE2/IORD
H1
M_D5
H2
M_D23
H3
M_DQS2
H4
VSSQ-DDR
H5
VSSQ-DDR
H21 VCCQ
H22 PTL0/D16/EX_AD16/IRQ4/
IRL4/ET0_COL/DREQ0/
LCD_D8
H23 PTL1/D17/EX_AD17/IRQ5/
IRL5/ET0_MDC/DACK0/
LCD_D9
H24 D15/EX_AD15
H25 D14/EX_AD14
I/O
Function
Power
Supply
IO
DDR-SDRAM data bus
VCCQ_
DDR
IO
DDR-SDRAM data bus
VCCQ_
DDR

DDR-SDRAM I/O VCC


DDR-SDRAM I/O VCC


Internal VDD

IO/IO/IO/I/I/IO/I/
O
Port/data bus/address-and-data
bus/external interrupt input/ETHER
management data IO/PCI
interrupt/LCD data
VCCQ
IO/IO/IO/I/I/O/O/ Port/data bus/address-and-data
O
bus/external interrupt input/ETHER
transmit data/DMA transfer end/LCD
data
VCCQ
O/O
Data enable/PCMCIA IOWR
VCCQ
O/O
Data enable/PCMCIA IORD
VCCQ
IO
DDR-SDRAM data bus
VCCQ_
DDR
IO
DDR-SDRAM data bus
VCCQ_
DDR
IO
DDR-SDRAM data strobe
VCCQ_
DDR

DDR-SDRAM I/O GND


DDR-SDRAM I/O GND


I/O VCC

IO/IO/IO/I/I/I/I/O
Port/data bus/address-and-data
bus/external interrupt input/ETHER
collision detection/DMA transfer
request/LCD data
VCCQ
IO/IO/IO/I/I/O/O/ Port/data bus/address-and-data
O
bus/external interrupt input/ETHER
management data clock/DMA
transfer acknowledge/LCD data
VCCQ
IO/IO
Data bus/address-and-data bus
VCCQ
IO/IO
Data bus/address-and-data bus
VCCQ
Rev. 1.00 Oct. 01, 2007 Page 23 of 1956
REJ09B0256-0100