SH7763 Datasheet, PDF (1015/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
Initial
Bit
Bit Name Value R/W
26
PV
0
R/W
25 to 12 
All 0 R
11 to 0 RFS[11:0] All 0 R/W
Description
Padding Insertion
Indicates whether the padding specified by RPADIR was
inserted in the receive frame processed with this descriptor
or not.
0: No padding inserted
1: Padding inserted
This bit can be changed by the E-DMAC write-back
processing.
Reserved
These bits are always read as 0. The write value should
always be 0.
Receive Frame Status
Indicate the status of the corresponding frame. A bit below,
when set to 1, indicates the occurrence of the
corresponding event. If an event indicated by any of RFS9
to RFS0 occurs, the frame is not received completely.
RFS[11:10]: Reserved
RFS[9]: Receive FIFO overflow (corresponding to the RFOF
bit in EESR)
RFS[8]: Detection of reception abort (Corresponding to the
RABT bit in EESR)
RFS[7]: Multicast address frame received (corresponding to
the RMAF bit in EESR)
RFS[6]: Carrier extension error (corresponding to the CEEF
bit in EESR)
RFS[5]: Carrier extension loss (corresponding to the CELF
bit in EESR)
RFS[4]: Residual-bit frame receive error (corresponding to
the RRF bit in EESR)
RFS[3]: Long frame receive error (corresponding to the
RTLF bit in EESR)
RFS[2]: Short frame receive error (corresponding to the
RTSF bit in EESR)
RFS[1]: PHY-LSI receive error (corresponding to the PRE
bit in EESR)
RFS[0]: CRC error on receive frame (corresponding to the
CERF bit in EESR)
Rev. 1.00 Oct. 01, 2007 Page 949 of 1956
REJ09B0256-0100