SH7763 Datasheet, PDF (1511/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 34 Serial Sound Interface (SSI)
In figure 34.9, system word length of 6 bits and a data word length of 4 bits are used. Neither of
these are possible with the SSI module but are used only for clarification of the other
configuration bits.
1. Inverted Clock
As basic sample format configuration except SCKP = 1
SSI_SCK
SSI_WS
1st Channel
2nd Channel
SSI_SDATA TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31
2. Inverted Word Select
Figure 34.10 Inverted Clock
As basic sample format configuration except SWSP = 1
SSI_SCK
SSI_WS
1st Channel
2nd Channel
SSI_SDATA TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31
Figure 34.11 Inverted Word Select
3. Inverted Padding Polarity
As basic sample format configuration except SPDP = 1
SSI_SCK
SSI_WS
1st Channel
2nd Channel
SSI_SDATA TD28 1 1 TD31 TD30 TD29 TD28 1 1 TD31 TD30 TD29 TD28 1 1 TD31
Figure 34.12 Inverted Padding Polarity
Rev. 1.00 Oct. 01, 2007 Page 1445 of 1956
REJ09B0256-0100