SH7763 Datasheet, PDF (1583/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 36 USB Function Controller (USBF)
36.3.8 Interrupt Select Register 2 (ISR2)
ISR2 selects the interrupt request source (USBFI1 or USBFI0) to issue the interrupt requests
indicated in IFR2 to INTC. When the corresponding bit in ISR2 is cleared to 0, the USBFI0
interrupt request is issued to INTC. When the bit is set to 1, the USBFI1 interrupt request is issued
to INTC. In the initial value, each of interrupt source of the IFR2 is USBFI1.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
————————————————
Initial value: — — — — — — — — — — — — — — — —
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
—
—
—
SURSE CFDN SOFE SETC SETIE
IS
IS
IS
IS
IS
Initial value: — — — — — — — — 0
0
0
1
11
11
R/W: R R R R R R R R R R R R/W R/W R/W R/W R/W
Bit
Bit Name
31 to 8 
7 to 5 
4
SURSE IS
3
CFDN IS
2
SOFE IS
1
SETCE IS
0
SETIE IS
Initial Value R/W
Undefined R
All 0
R
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
Description
Reserved
These bits are always read as undefined value. Write
value should always be 0.
Reserved
These bits are always read as 0. The write value
should always be 0.
SURSE Interrupt Select
CFDN Interrupt Select
SOFE Interrupt Select
SETCE Interrupt Select
SETIE Interrupt Select
Rev. 1.00 Oct. 01, 2007 Page 1517 of 1956
REJ09B0256-0100