SH7763 Datasheet, PDF (1427/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 32 PC Card Controller (PCC)
Table 32.1 Features of the PCMCIA Interface
Item
Feature
Access
Random access
Data bus
8/16 bits
Memory type
Masked ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM
Common memory capacity Maximum 64 Mbytes (Supports full PCMCIA specifications by using
a segment bit (an address bit for the PC card))
Attribute memory capacity Maximum 32 Mbytes
I/O space capacity
Maximum 32 Mbytes
Others
Dynamic bus sizing for I/O bus width^*
The PCMCIA interface can be accessed from the address-
conversion region and non-address-conversion region.
Note: * Dynamic bus sizing for the I/O bus width is supported only in little-endian mode.
This LSI can directly access 32- and 64-Mbyte physical areas in a 64-Mbyte memory space and an
I/O space of the PC card (continuous 32/16-Mbyte area mode). This LSI provides a segment bit
(an address bit for the PC card) in the general control register for area 6 to support a common
memory space with full PCMCIA specifications (64 Mbytes).
Continuous 32-Mbyte Area Mode: Setting 0 (initial value) in bit 3 (P0MMOD) of the general
control register enables the continuous 32-Mbyte area mode. In this mode, the attribute memory
space and I/O memory space are 32 Mbytes and the common memory space is 64 Mbytes. In the
common memory space, set 1 in bit 2 (P0PA25) of the general control register to access an
address of more than 32 Mbytes. By this operation, 1 is output to A25 pin, enabling an address
space of more than 32 Mbytes to be accessed. When an address of 32 Mbytes or less is accessed,
no setting is required (initial value: 0). This bit does not affect access to attribute memory space
or I/O memory space.
Figure 32.2 shows the relationship between the memory space of this LSI and the memory and I/O
spaces of the PC card in the continuous 32-Mbyte area mode. Although memory space and I/O
space are supported in area 6.
In area 6, set 1 in bit 0 (P0REG) of the general control register to access the common memory
space of the PC card, and set 0 in bit 0 to access the attribute memory space (initial value: 0). By
this operation, the set value is output to PCC_REG pin, enabling any space to be accessed. When
the I/O space is accessed in area 6, the output of PCC_REG pin is always 0 regardless of the value
of bit 0 (P0REG).
See the register descriptions in section 32.3, Register Descriptions for details of register settings.
Rev. 1.00 Oct. 01, 2007 Page 1361 of 1956
REJ09B0256-0100