SH7763 Datasheet, PDF (1658/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 37 LCD Controller (LCDC)
Table 37.4 I/O Clock Frequency and Clock Division Ratio
DCDR[5:0]
Clock Division
Ratio
50.000
I/O Clock Frequency (MHz)
60.000
66.000
000001
1/1
50.000
60.000
66.000
000010
1/2
25.000
30.000
33.000
000011
1/3
16.667
20.000
22.000
000100
1/4
12.500
15.000
16.500
000110
1/6
8.333
10.000
11.000
001000
1/8
6.250
7.500
8.250
001100
1/12
4.167
5.000
5.500
010000
1/16
3.125
3.750
4.125
011000
1/24
2.083
2.500
2.750
100000
1/32
1.563
1.875
2.063
Note: Any setting other than above is handled as a clock division ratio of 1/1 (initial value).
Rev. 1.00 Oct. 01, 2007 Page 1592 of 1956
REJ09B0256-0100