SH7763 Datasheet, PDF (863/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
Name
Abbreviation R/W
Receive descriptor final flag register RDFFR0 R/W
Transmit descriptor fetch address TDFAR0 R/W
register
Transmit descriptor finished
address register
TDFXR0 R/W
Transmit descriptor final flag register TDFFR0 R/W
Overflow alert FIFO threshold register FCFTR0 R/W
Receive data padding insert register RPADIR0 R/W
E-DMAC start register
EDSR1
W
E-DMAC mode register
EDMR1
R/W
E-DMAC transmit request register EDTRR1 R/W
E-DMAC receive request register EDRRR1 R/W
Transmit descriptor list start
address register
TDLAR1 R/W
Receive descriptor list start
address register
RDLAR1 R/W
E-MAC/E-DMAC status register EESR1
R/W
E-MAC/E-DMAC status interrupt EESIPR1 R/W
permission register
Transmit/receive status copy
enable register
TRSCER1 R/W
Receive missed-frame counter
register
RMFCR1 R/W
Transmit FIFO threshold register TFTR1
R/W
FIFO depth register
FDR1
R/W
Receiving method control register RMCR1 R/W
Receive descriptor fetch address RDFAR1 R/W
register
Receive descriptor finished
address register
RDFXR1 R/W
Receive descriptor final flag register RDFFR1 R/W
Transmit descriptor fetch address TDFAR1 R/W
register
P4 Area
Address
Area 7
Address
Access
Size
H'FEE0 003C H'1EE0 003C 32
H'FEE0 0014 H'1EE0 0014 32
H'FEE0 0018 H'1EE0 0018 32
H'FEE0 001C H'1EE0 001C 32
H'FEE0 0468 H'1EE0 0468 32
H'FEE0 0460 H'1EE0 0460 32
H'FEE0 0800 H'1EE0 0800 32
H'FEE0 0C00 H'1EE0 0C00 32
H'FEE0 0C08 H'1EE0 0C08 32
H'FEE0 0C10 H'1EE0 0C10 32
H'FEE0 0810 H'1EE0 0810 32
H'FEE0 0830 H'1EE0 0830 32
H'FEE0 0C28 H'1EE0 0C28 32
H'FEE0 0C30 H'1EE0 0C30 32
H'FEE0 0C38 H'1EE0 0C38 32
H'FEE0 0C40 H'1EE0 0C40 32
H'FEE0 0C48 H'1EE0 0C48 32
H'FEE0 0C50 H'1EE0 0C50 32
H'FEE0 0C58 H'1EE0 0C58 32
H'FEE0 0834 H'1EE0 0834 32
H'FEE0 0838 H'1EE0 0838 32
H'FEE0 083C H'1EE0 083C 32
H'FEE0 0814 H'1EE0 0814 32
Rev. 1.00 Oct. 01, 2007 Page 797 of 1956
REJ09B0256-0100