SH7763 Datasheet, PDF (515/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
Section 13 PCI Controller (PCIC)
The PCI controller (PCIC) controls the PCI bus for data transfers between memory connected to
an external bus and a PCI device connected to the PCI bus. The ability to connect PCI devices
facilitates the design of systems using the PCI bus and enables more compact systems capable of
faster data transfer.
The PCIC functions as a bus bridge which connects an external PCI bus to the internal
SuperHyway bus. It provides a device connected to the external PCI bus with a channel for access
to the on-chip modules connected to the SuperHyway bus. The PCIC supports both the host bus
bridge mode and normal mode (non-host mode). In host busbridge mode, PCI bus arbitration
control is available and in normal mode, arbitration is executed by the external PCI bus arbiter.
13.1 Features
The PCIC has the following features:
• Supports subset of PCI Local Bus Specification Revision 2.2
• PCI bus operating speeds of 33 MHz/66 MHz
• 32-bit data bus
• PCI master and target functions
• Supports subset of PCI power management Revision 1.1
• Supports the host bus bridge mode and normal mode (selectable by MD6 pin settings)
• Supports the PCI bus arbiter (in host bus bridge mode)
 Supports four external masters
 Pseudo-round-robin or fixed priority arbitration
 Supports external bus arbiter mode
• Supports configuration mechanism #1 (in host bus bridge mode)
• Supports burst transfer
• Parity check and error report
Rev. 1.00 Oct. 01, 2007 Page 449 of 1956
REJ09B0256-0100