SH7763 Datasheet, PDF (1071/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Initial
Bit
Bit Name Value
7, 6 
All 0
5, 4 FRC[1:0] 00
3
STRB
0
2
REQ
0
1
VLD
0
0
STAT
0
Section 25 Stream Interface (STIF)
R/W Description
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Input Clock of Free-Running Timer
00: Timer input clock is 1/2 of peripheral clock 0
01: Timer input clock is 1/4 of peripheral clock 0
10: Timer input clock is 1/8 of peripheral clock 0
11: Setting prohibited
R/W ST_STRB Pin Polarity
0: Data is transferred/received on the rising edge of
ST_STRB
1: Data is transferred/ received on the falling edge of
ST_STRB
R/W ST_REQ Pin Polarity
0: ST_REQ is active-high
1: ST_REQ is active-low
R/W ST_VALID Pin Polarity
0: ST_VALID is active- high
1: ST_VALID is active- low
R/W ST_START Pin Polarity
0: ST_START is active- high
1: ST_START is active- low
Rev. 1.00 Oct. 01, 2007 Page 1005 of 1956
REJ09B0256-0100