SH7763 Datasheet, PDF (1345/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 30 SIM Card Module (SIM)
F: Absolute value of the deviation of the clock frequency
In the above formula, if F = 0 and D = 0.5, then the receive margin is as follows.
When D = 0.5, F = 0,
M = (0.5 − 1/2 × 372) × 100% = 49.866%
(2) Retransmit Operation
Retransmit operations when the smart card interface is in receive mode and in transmit mode are
described below.
(a) Retransmission when the smart card interface is in receive mode (T = 0)
Figure 30.8 shows retransmit operations when the smart card interface is in receive mode. Step
(1) to step (5) of figure 30.8 correspond to the following operation.
1. If an error is detected as a result of checking the received parity bit, the PER bit in SCSSR is
automatically set to 1. At this time, if the RIE bit in SCSCR is set to enable, an ERI request is
issued. The PER bit in SCSSR should be cleared to 0 before the sampling timing for the next
parity bit.
2. The RDRF bit in SCSSR is not set for frames in which a parity error occurs.
3. If no error is detected as a result of checking the received parity bit, the PER bit in SCSSR is
not set.
4. If no error is detected as a result of checking the received parity bit, it is assumed that
reception was completed normally, and the RDRF bit in SCSSR is automatically set to 1. If the
RIE bit in SCSCR is 1 and the EIO bit is 0, an RXI request is generated.
5. If a normal frame is received, the pin retains its high-impedance state at the timing for
transmission of error signals.
nth transmit frame
Retansmit frame
(n+1) th transmit frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 DP DE
RDRF
PER
(2)
(1)
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 DP
Ds D0 D1 D2 D3 D4
(5)
(4)
(3)
Figure 30.8 Retransmission when Smart Card Interface is in Receive Mode
Rev. 1.00 Oct. 01, 2007 Page 1279 of 1956
REJ09B0256-0100