SH7763 Datasheet, PDF (2009/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Appendix
I. Version Registers
The registers related to the version registers are shown below.
Table I.1 Register Configuration
Name
Processor version
register
Product register
[Legend]
x:
Undefined
Abbrev. R/W Initial Value P4 Address Area 7 Address
PVR
R H'1020 0Axx H'FF00 0030 H'1F00 0030
Size
32
PRR
R H'0000 092x H'FF00 0044 H'1F00 0044
32
(1) Processor Version Register (PVR)
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Version information
Initial value: 0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Version information

Initial value: 0
0
0
0
1
0
1
0 
R/W: R R R R R R R R        
(2) Product Register (PRR)
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Version information
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Version information

Initial value: 0
0
0
0
1
0
0
1
0
0
1
0 
R/W: R R R R R R R R R R R R    
Rev. 1.00 Oct. 01, 2007 Page 1943 of 1956
REJ09B0256-0100