SH7763 Datasheet, PDF (1818/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 40 General Purpose I/O (GPIO)
40.2.42 Pin Select Register 3 (PSEL3)
PSEL3 is a 16-bit readable/writable register that selects the functions of the Port L (PTL), and Port
M (PTM) pins multiplexed with “other function”.
When using the pins with “other function” assigned, set PSEL3 and then set the corresponding
port control register to select “other function”.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
PTSEL3[14:12]
—
PTSEL3[10:8]
—
PTSEL3[6:4]
—
PTSEL3[2:0]
Initial value: 0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Bit
Bit Name
15
—
14 to 12 PTSEL3
[14:12]
11
—
Initial
value
0
100
0
R/W
R
R/W
R
Description
Reserved
This bit is always read as 0, and the write value should
always be 0.
These bits select the functions of Port L (PTL7 to PTL4)
and Port M (PTM7 to PTM1).
Bit setting
Selected function
PTSEL3[14:12] PTL7 to PTL4
PTM7 to
PTM1
1xx
LBSC*¹/ 
LBSC*¹/
EXCPU
EXCPU
000
LCDC

RMII0
001
MII0

MII0
010
DMAC1 PCIC*² RMII0
011
STIF0

STIF0
[Legend]
x: Don't care
Notes: 1. When 32-bit is selected as the data bus
width in the LBSC, select this pin function.
2. When clearing interrupt mask of the
interrupt controller (INTC) with the PCIC
function selected, make sure to select the
PCIC function with this register in advance.
Reserved
This bit is always read as 0, and the write value should
always be 0.
Rev. 1.00 Oct. 01, 2007 Page 1752 of 1956
REJ09B0256-0100