SH7763 Datasheet, PDF (540/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 PCI Controller (PCIC)
Initial
Bit
Bit Name Value R/W
2, 1
LAT
00
SH: R
PCI: R
0
ASI
0
SH: R
PCI: R
Description
Memory Type
Indicates the memory type of local address space 0.
00: 32-bit base address and 32-bit space
01: 32-bit base address and 1-Mbyte space (Not
supported)
10: 64-bit base address (Not supported)
11: Reserved
Address Space Indicator
Indicates whether the base address in this register
indicates the I/O or memory space.
0: Memory space
1: I/O space
(15) PCI Memory Base Address Register 1 (PCIMBAR1)
This register packages the memory space base address register of the PCI configuration register
that is prescribed with PCI local bus specification.
Refer to Section 13.4.4 (1), Accessing This LSI Address Space.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
MBA (upper)
MBA (lower)
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R R
PCI R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
MBA (lower)
LAP
LAT
ASI
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R R R R R R R R R R R R R R R R
PCI R/W: R R R R R R R R R R R R R R R R
Rev. 1.00 Oct. 01, 2007 Page 474 of 1956
REJ09B0256-0100