SH7763 Datasheet, PDF (1741/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 39 D/A Converter (DAC)
39.3.1 D/A Data Registers 0 and 1 (DADR0, DADR1)
DADR0 and DADR1 are 8-bit readable/writable registers that store data for D/A conversion.
When the D/A output enable bits (DAOE1, DAOE0) of the DA control register (DACR) are set to
1, the contents of the D/A data register are converted and output to analog output pins (DA0,
DA1). The D/A data register is initialized to H'00 at reset. Note that the D/A data register is not
initialized upon entering the software standby, module standby, or hardware standby mode.
Bit: 7
6
5
4
3
2
1
0
————————
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit
7 to 0
Bit Name Initial Value R/W Description

H'00
R/W 8-bit registers that store data for D/A conversion.
Rev. 1.00 Oct. 01, 2007 Page 1675 of 1956
REJ09B0256-0100