SH7763 Datasheet, PDF (1018/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 Gigabit Ethernet Controller (GETHER)
(3) Descriptor and Transmit/Receive Buffer
(a) Transmission
Each transmit descriptor specifies one transmit buffer. The E-DMAC transfers a transmit frame
stored in a transmit buffer specified by a transmit descriptor to the transmit FIFO. Multiple
transmit frames stored in transmit buffers specified by multiple descriptors can be connected into
one transmit frame and transferred to the transmit FIFO.
Figure 23.5 shows the relationship between the transmit descriptors and transmit buffers.
Tfansmit descriptor ring
(in memory)
TACT
TDL
TFP[1:0]
10 1 1
Transmit descriptor 1
(Transmit frame A)
10 1 0
Transmit descriptor 2
(Transmit frame B)
10 0 0
Transmit descriptor 3
(Transmit frame B)
10 0 1
Transmit descriptor 4
(Transmit frame B)
10 1 0
Transmit descriptor 5
(Transmit frame C)
10 0 1
Transmit descriptor 6
(Transmit frame C)
10 1 1
Transmit descriptor 7
(Transmit frame D)
11 1 1
Transmit descriptor 8
(Transmit frame E)
Tfansmit buffer
(in memory)
4 bytes
Transmit buffer 1
Transimit buffer 2
Transmit buffer 3
Transmit buffer 4
Transmit buffer 5
Transmit buffer 6
Transimit buffer 7
Transmit buffer 8
Transmit frame data
(Transmit data transferred by DMA transfer from
memory to transmit FIFO is configured as a frame
in the MAC and output to the GMII/MII/RMII.)
Transmit frame A
Transmit buffer 1
Transmit frame B
Transmit buffer 4 Transmit buffer 3 Transimit buffer 2
Transmit buffer 2 to 4 are connected to be one frame
(transmit frame B) and output to the GMII/MII/RMII.
Transmit frame C
Transmit buffer 6 Transmit buffer 5
Transmit buffer 5 and 6 are connented to be one frame.
(transmit frame C) arnd output to the GMII/MII/RMII.
Transmit frame D
Transmit buffer 7
Transmit frame E
Transmit buffer 8
Figure 23.5 Relationship between Transmit Descriptor and Transmit Buffer
(b) Reception
Each receive descriptor specifies one receive buffer. The E-DMAC receives a receive frame from
the receive FIFO and stores it in a receive buffer specified by a receive descriptor. If the receive
frame size exceeds the receive buffer size, the remaining data of the receive frame can be stored in
Rev. 1.00 Oct. 01, 2007 Page 952 of 1956
REJ09B0256-0100