SH7763 Datasheet, PDF (1088/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 25 Stream Interface (STIF)
(c) Work Area
The size of the work area in external memory can be selected from among 0, 16, 32, and 48 bytes.
(d) Transmit Packet Interval Setting at Transmission
The transmit packet interval setting at transmission can be selected from fixed-interval
transmission or time-stamp transmission, according to the STMP[1:0] bits in STIMDR.
• Fixed-interval transmission
Transmission is performed using the value set in the ICYC[11:0] bits in STICR as the packet
interval.
1 to 4096 cycles of peripheral clock 0 can be set.
• Time-stamp transmission
Transmission is performed with time stamp-based packet intervals. The time stamp counter
starts counting from transmission of the first packet. Counting can be started from any desired
value by setting the value before transmission.
Note that writing to the counter during transmission of a packet is prohibited.
(e) Interrupt Source during Transmission
During clock valid transmission, the following interrupt source is available.
• Transmit packet count interrupt
Rev. 1.00 Oct. 01, 2007 Page 1022 of 1956
REJ09B0256-0100