SH7763 Datasheet, PDF (709/2026 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 16 Clock Pulse Generator (CPG)
(3) Notes on Using PLL or DLL Oscillator Circuit
Separate VDD-PLL and VSS-PLL from the other VDD and VSS lines at the board power supply
source, and insert resistors RCB and bypass capacitors CPB near the pins for noise filtering.
VDD-DLL and VSS-DLL should be set to the same level as the VDD and VSS levels,
respectively.
VDD-PLL1
VSS-PLL1
SH7763
VDD-PLL2
VSS-PLL2
VDD-PLL3
VSS-PLL3
RCB1
CPB11 CPB12 ^4.7Ω
0.1µF 1µF
RCB2
CPB21 CPB22 4.7 Ω
0.1µF 1µF
RCB3
CPB31 CPB32 ^{4.7 Ω}
0.1µF 1µF
Recommended values:
RCB1 = RCB2 = RCB3 = 4.7Ω
CPB11 = CPB21 = CPB31 = 0.1µF
CPB12 = CPB22 = CPB32 = 1µF
1.25V
Figure 16.3 Notes on Using PLL or DLL Oscillator Circuit
Rev. 1.00 Oct. 01, 2007 Page 643 of 1956
REJ09B0256-0100